IJIRCSTJournal International Journal of Innovative Research in Computer Science and Technology I S Volume 10 Issue 2 Department of Electronics and Communications Engineering English March - April 2022 N N Y 2023 06 12 Computer Sciences Verilog HDL using LTE Implementation MAP Algorithm English Y 611 614 T. Rama Krishna English Y T. Krishna Murthy English N N. Vilasrao Sarode English N P. Srilakshmi English N V. Geetha Sri English N https://doi.org/10.55524/ijircst.2022.10.2.115 In many communication systems, turbo coding Techniques for Encoding and Decoding are employed to repair errors. As compared to other error correction codes, turbo codes provide great error correcting capabilities. For the implementation of the Turbo decoder, a Very Large Scale Integration (VLSI) architecture is suggested in this study. The Maximum-a-Posteriori (MAP) algorithm is employed at the decoder side, where soft-in-soft-out decoders, interleaves, and deinterleavers are all used. The usage of the MAP algorithm reduces the quantity of iterations necessary to decode the information bits being transferred. This research employs a system for the encoder component that consists of two recursive convolutional encoders and a pseudorandom interleaver on the encoder side. Tools from Octave and Xilinx Vivado are used for the Turbo encoding and decoding. The system is synthesised and implemented using a specialised integrated circuit. English Encoding, Decoding Techniques. MAP, Xilinx, vivado. https://ijircst.org/abstract.php?article_id=1132